?200 8 fairchild semiconductor international rev. a 1 , oct 2008 fqb12p20 / fqi12p20 fqb12p20 / fqi12p20 200v p-channel mosfet general description these p-channel enhancement mode power field effect transistors are produced using fairchild?s proprietary, planar stripe, dmos technology. this advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for high efficiency switching dc/dc converters. features ? -11.5a, -200v, r ds(on) = 0.47 ? @v gs = -10 v ? low gate charge ( typical 31 nc) ? low crss ( typical 30 pf) ? fast switching ? 100% avalanche tested ? improved dv/dt capability absolute maximum ratings t c = 25c unless otherwise noted thermal characteristics symbol parameter fqb12p20 / fqi12p20 units v dss drain-source voltage -200 v i d drain current - continuous (t c = 25c) -11.5 a - continuous (t c = 100c) -7.27 a i dm drain current - pulsed (note 1) -46 a v gss gate-source voltage 30 v e as single pulsed avalanche energy (note 2) 810 mj i ar avalanche current (note 1) -11.5 a e ar repetitive avalanche energy (note 1) 12 mj dv/dt peak diode recovery dv/dt (note 3) -5.5 v/ns p d power dissipation (t a = 25c) * 3.13 w power dissipation (t c = 25c) 120 w - derate above 25c 0.96 w/c t j , t stg operating and storage temperature range -55 to +150 c t l maximum lead temperature for soldering purposes, 1/8 " from case for 5 seconds 300 c symbol parameter typ max units r jc thermal resistance, junction-to-case -- 1.04 c / w r ja thermal resistance, junction-to-ambient * -- 40 c / w r ja thermal resistance, junction-to-ambient -- 62.5 c / w * when mounted on the minimum pad size recommended (pcb mount) d 2 -pak fqb series i 2 -pak fqi series g s d g s d ? ? ? ? ! ! ! ! ! ! ! ! ! ! ! ! ? ? ? ? ! ! ! ! ! ! ! ! ! ! ! ! s d g oct obe r 200 8 qfet ? ? r ohs c ompliant
?200 8 fairchild semiconductor international fqb12p20 / fqi12p20 (note 4) (note 4, 5) (note 4, 5) (note 4) rev. a 1 , oct 2008 elerical characteristics t c = 25c unless otherwise noted notes: 1. repetitive rating : pulse width limited by maximum junction temperature 2. l = 9.2mh, i as = -11.5a, v dd = -50v, r g = 25 ?, starting t j = 25c 3. i sd -11.5a, di/dt 300a/ s, v dd bv dss, starting t j = 25c 4. pulse test : pulse width 300 s, duty cycle 2% 5. essentially independent of operating temperature symbol parameter test conditions min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a -200 -- -- v ? bv dss / ? t j breakdown voltage temperature coefficient i d = -250 a, referenced to 25c -- - -- v/c i dss zero gate voltage drain current v ds = -200 v, v gs = 0 v -- -- -1 a v ds = -160 v, t c = 125c -- -- -10 a i gssf gate-body leakage current, forward v gs = -30 v, v ds = 0 v -- -- -100 na i gssr gate-body leakage current, reverse v gs = 30 v, v ds = 0 v -- -- 100 na on characteristics v gs(th) gate threshold voltage v ds = v gs , i d = -250 a -3.0 -- -5.0 v r ds(on) static drain-source on-resistance v gs = -10 v, i d = -5.75 a -- 0.36 0.47 ? g fs forward transconductance v ds = -40 v, i d = -5.75 a -- 6.4 -- s dynamic characteristics c iss input capacitance v ds = -25 v, v gs = 0 v, f = 1.0 mhz -- 920 1200 pf c oss output capacitance -- 190 250 pf c rss reverse transfer capacitance -- 30 40 pf switching characteristics t d(on) turn-on delay time v dd = -100 v, i d = -11.5 a, r g = 25 ? -- 20 50 ns t r turn-on rise time -- 195 400 ns t d(off) turn-off delay time -- 40 90 ns t f turn-off fall time -- 60 130 ns q g total gate charge v ds = -160 v, i d = -11.5 a, v gs = -10 v -- 31 40 nc q gs gate-source charge -- 8.1 -- nc q gd gate-drain charge -- 16 -- nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -- -- -11.5 a i sm maximum pulsed drain-source diode forward current -- -- -46 a v sd drain-source diode forward voltage v gs = 0 v, i s = -11.5 a -- -- -5.0 v t rr reverse recovery time v gs = 0 v, i s = -11.5 a, di f / dt = 100 a/ s -- 180 -- ns q rr reverse recovery charge -- 1.44 -- c
?200 8 fairchild semiconductor international fqb12p20 / fqi12p20 rev. a 1 , oct 2008 0 5 10 15 20 25 30 35 0 2 4 6 8 10 12 v ds = -100v v ds = -40v v ds = -160v note : i d = -11.5 a -v gs , gate-source voltage [v] q g , total gate charge [nc] 10 -1 10 0 10 1 0 400 800 1200 1600 2000 2400 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd notes : 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitance [pf] -v ds , drain-source voltage [v] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 10 -1 10 0 10 1 150 notes : 1. v gs = 0v 2. 250 s pulse test 25 -i dr , reverse drain current [a] -v sd , source-drain voltage [v] 0 10203040 0.0 0.5 1.0 1.5 2.0 note : t j = 25 v gs = - 20v v gs = - 10v r ds(on) [ ? ], drain-source on-resistance -i d , drain current [a] 246810 10 -1 10 0 10 1 150 25 -55 notes : 1. v ds = -40v 2. 250 s pulse test -i d , drain current [a] -v gs , gate-source voltage [v] 10 -1 10 0 10 1 10 -1 10 0 10 1 v gs top : -15.0 v -10.0 v -8.0 v -7.0 v -6.5 v -6.0 v bottom : -5.5 v notes : 1. 250 s pulse test 2. t c = 25 -i d , drain current [a] -v ds , drain-source voltage [v] typical characteristics figure 5. capacitance characteristics figure 6. gate charge characteristics figure 3. on-resistance variation vs. drain current and gate voltage figure 4. body diode forward voltage variation vs. source current and temperature figure 2. transfer characteristics figure 1. on-region characteristics
?200 8 fairchild semiconductor international fqb12p20 / fqi12p20 rev. a 1 , oct 2008 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 n ote s : 1. z jc (t) = 1.04 /w m ax. 2. d u ty f actor, d =t 1 /t 2 3. t jm - t c = p dm * z jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z jc (t), therm al response t 1 , s q u are w ave p u lse d ura tion [sec] 25 50 75 100 125 150 0 2 4 6 8 10 12 -i d , drain current [a] t c , case temperature [ ] 10 0 10 1 10 2 10 -1 10 0 10 1 10 2 dc 10 ms 1 ms 100 s operation in this area is limited by r ds(on) notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse -i d , drain current [a] -v ds , drain-source voltage [v] -100 -50 0 50 100 150 200 0.0 0.5 1.0 1.5 2.0 2.5 notes : 1. v gs = -10 v 2. i d = -5.75 a r ds(on) , (normalized) drain-source on-resistance t j , junction temperature [ o c] -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 notes : 1. v gs = 0 v 2. i d = -250 a -bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] typical characteristics (continued) figure 9. maximum safe operating area figure 10. maximum drain current vs. case temperature figure 7. breakdown voltage variation vs. temperature figure 8. on-resistance variation vs. temperature figure 11. transient thermal response curve t 1 p dm t 2
?200 8 fairchild semiconductor international fqb12p20 / fqi12p20 rev. a 1 , oct 20008 charge v gs -10v q g q gs q gd -3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut charge v gs -10v q g q gs q gd -3ma v gs dut v ds 300nf 50k 200nf 12v same type as dut v ds v gs 10% 90% t d(on) t r t on t off t d(off) t f v dd -10v v ds r l dut r g v gs v ds v gs 10% 90% t d(on) t r t on t off t d(off) t f v dd -10v v ds r l dut r g v gs e as =li as 2 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time -10v dut r g l i d t p e as =li as 2 ---- 2 1 e as =li as 2 ---- 2 1 ---- 2 1 -------------------- bv dss -v dd bv dss v dd v ds bv dss t p v dd i as v ds (t) i d (t) time -10v dut r g l l i d i d t p gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
?200 8 fairchild semiconductor international fqb12p20 / fqi12p20 rev. a 1 , oct 2008 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g compliment of dut (n-channel) v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g compliment of dut (n-channel) v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period --------------------------
?200 8 fairchild semiconductor international fqb12p20 / fqi12p20 rev. a 1 , oct 2008 di mensions in millimeters mechanical dimensions d 2 - pa k
?200 8 fairchild semiconductor international fqb12p20 / fqi12p20 rev. a 1 , oct 2008 mechanical dimensions dimensions in millimeter s i 2 - pa k
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